The present invention relates generally to the interconnection of integrated circuits and, more particularly, to the substrates on which the integrated circuits are mounted, and even more particularly to laminate combination build-ups for such substrates, and even more particularly to layers comprising large areas of metal as typically used for ground and power planes in such build-ups.
Printed circuit boards and substrates used for the interconnection and packaging of integrated circuit chips are typically constructed by superimposing and laminating together thin layers of insulating and conducting materials. Common construction techniques involve a high temperature lamination cycle during which the bonding of the layers to each other occurs. The resulting bonded construct is typically referred to as a laminate.
Usually at least one of the layers of the laminate is a sheet of metal with interspersed openings. Depending upon its intended purpose, the metal can serve as either a ground plane or a power plane. In addition to providing low impedance access to ground and power potentials at a relatively constant potential across the extent of the construct, these metalized planes also provide an important shielding function. Signals from metal traces on a signal layer on one side of one of the metalized planes can be shielded from signals originating from metal traces on a signal layer on the opposite side of the metalized plane. This shielding is, however, somewhat imperfect as will be explained in the following.
During the high temperature lamination process, the organic materials used in the layers create gasses. If these gasses are not allowed to exit the laminate, the resulting voids in the laminate can result in a low bonding strength and create other problems. In order to provide a path for these gases to escape, it is necessary to create a series of openings in metalized planes across the extent of the laminate. The required size and proximity of the openings and overall percent of the open areas is processing dependent. Unfortunately, these openings provide a path for coupling signals from one side of the plane to traces on the other. The resulting cross-talk is especially acute for traces that pass over the openings. Thus, solving one problem, the creation of gasses in the laminate during lamination, creates another, cross-talk between signal layers on opposite sides of the metalized plane. The higher the frequency, the greater the cross-talk problem. Since modern electronic devices are typically being driven to higher and higher frequencies, the cross-talk problem is becoming more and more of a problem.
Thus there is a need for techniques to reduce the cross-talk between two signal layers on opposite sides of a metalized ground or power layer in a laminate used in printed circuit boards and substrates intended for the interconnection and packaging of integrated circuit chips.
In accordance with aspects of the present invention, high-performance laminates for interconnecting integrated circuits are disclosed which eliminate or substantially reduce the disadvantages associated with prior interconnection techniques.
In a representative embodiment of the present invention, an interconnecting laminate includes a signal layer overlaying a conducting power/ground layer and separated by a dielectric layer of specified thickness. The signal layer includes conducting traces, and the power/ground layer is primarily a sheet of conducting material with interspersed open areas. The open areas are an essential part of the fabrication process and provide the means by which dielectric layer gasses created during fabrication can escape. In the representative embodiment, the open areas required in the power/ground layer are displaced such that none of the openings is overlain by the signal layer. Additional signal layers are included in other embodiments.
Technical advantages of the embodiments disclosed include increased speed as distributed resistance and inductance in the conducting paths are reduced. The path of conduction followed in the power/ground layer is shorter than in earlier solutions. In addition, cross-talk between two closely spaced signal lines is minimized by shielding each of their signal paths from the other. Shielding is effected via placement of the signal layers on opposite sides of the power/ground layer, and by displacement of open areas such that the open areas do not overlay the conduction paths on the signal layers.